Typical power semiconductor switching devices are designed for low area specific on-state resistance Rdson*A. A further quality measure is the FOM (figure of merit) given by the product of the on-state resistance Rdson and the gate charge that ideally does not degrade when decreasing the on-state resistance Rdson. A further design constraint is the FOMoss given by the product of the on-state resistance and the output charge that is ideally as low as possible.
Power semiconductor devices with vertical channels, e.g., trench-type MOSFETs (metal oxide semiconductor field effect transistors) typically include regularly arranged electrode structures buried in a semiconductor portion between active transistor areas of FET cells. Each buried electrode structure may include a gate and a field electrode, wherein the field electrode is buried deeper in the semiconductor portion than the gate electrode. In a reverse blocking mode, the field electrodes deplete active transistor areas in a lateral direction such that, without suffering from a loss of reverse blocking capabilities, the impurity concentration in the active transistor areas may be increased, thus decreasing the on-state resistance Rdson. It is desirable to provide semiconductor devices with buried gate electrodes and reliable gate contacts that can be provided in a cost effective manner.